This invention relates to a semiconductor device and the manufacturing method therefor, particularly to the semiconductor device related to the constitution and the formation of the wiring used in an integrated circuit and the manufacturing method therefor.
In recent years, an integrated circuit rapidly increases in integration density and the operating speed. In order to increase the operating speed of the MOS FET used as an active element in an integrated circuit, it is notably important to reduce the resistance of the gate wiring (including a gate electrode).
According to one of the methods for reducing the gate wiring resistance, a gate is formed of silicide of refractory metal such as Mo and W, or the silicide stacked on a polysilicon layer, instead of polysilicon. The silicide of refractory metal is stable for the heat treatment at a high temperature and has resistivity to chemicals. In addition, the refractory metal silicide has high compatibility with the process using the polysilicon.
When the metal silicide is used to form the gate wiring, however, the wiring has a sheet resistance of no less than 10Ω/square even if the gate electrode is formed as high as 300–400 nm. If the height of the gate electrode increases to decrease the sheet resistance, however, various problems occur: a critical dimension loss will be increased when the etching step is performed, or the etching selectivity between the gate oxide film and the material of the gate electrode is not so large that the etching cannot be stopped at the gate oxide film and a silicon substrate of the device may be also etched.
The gate electrode and wiring may be formed of metal in order to obtain the gate wiring having, for example, the sheet resistance of 1Ω/square, and height lower than 400 nm so as to increase the transmission speed. The metal gate wiring, however, is not so stable to the heat treatment at a high temperature or not so good at the resistance to chemicals as metal silicide, and thus has merely low compatibility with the process using the polysilicon.
When metal is used to form the gate wiring, the top and the side of the gate electrode may be covered with a protection film in order to compensate the low resistance to heat and chemicals. It is essential for the protection film to have not only high heat resistance and high chemical resistance, but also to secure high insulation from the source and drain regions.
A silicon nitride film is thought to be one of the most suitable protection films in consideration of the barrier function during the oxidation process at a high temperature or the stabilization against the chemicals containing hydrofluoric acid. The silicon nitride film may be deposited in the plasma CVD or low pressure CVD process. In general, the protection film deposited in the low pressure CVD process is formed to be dense and contains smaller amount of hydrogen in comparing with the film deposited in the plasma CVD process. While, as will be described later, the low pressure CVD process needs to be performed at a temperature as high as 650–800° C. to obtain the film having enough thickness.
The metal used for the gate wiring will be considered next. W, one of the metals used for forming the gate wiring, is easily oxidized in an atmosphere having a low oxide concentration to turn into WO3. Accordingly, in order to form a silicon nitride film as a protection film on the silicon wafer on which a W film is formed, the atmosphere in the chamber needs to be strictly controlled to maintain the oxide concentration at a low level not to oxidize the surface of the W film during a period of time from the introducing of the wafer into a reaction chamber to the time when the chamber temperature rises up to the level suitable for the process, since the low pressure CVD process needs to be performed at a high temperature of 650–800° C. to obtain a silicon nitride film, as described above.
The phase transition from orthorhombic to tetragonal occurs in the tungsten oxide film formed prior to the deposition of the SiN film at near 750° C. In this time, the surface roughness of the tungsten oxide film will be grown. When the surface roughness is grown, the surface of the gate cannot be smooth even if the protection film is formed on the gate electrode. On such an uneven surface, the formation of a fine pattern or the etching by the photolithography cannot be easily performed, and the wiring cannot be formed in a desired shape.